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LERA DDS Quality controlSerial DDS-1-01 (Kaena 16.275 MHz)
1. Checklist
2. Power supply measurements (use EDAC 10953A 12 V 80 W adapter only)
3. Program DDS Connect USB to linux, check that /dev/ttyUSB{0,1,2,3} appear, open screen to each of them and check red/green LED blink on FTDI board. Verified: VVVV. For production, the Vectron clock is used /4 at 25 MHz, and the LO-BUF board is used to distribute the clock to the DDS boards. DO NOT connect the 50 MHz output of the Vectron directly to the DDS, as there may be issues with the correct KP setting at boot time. Primary and secondary DDS, reset to factory default and clear parameter memory: CLR S Power cycle and check with frequency meter that they both output 8.8817842 MHz, the default of 10 MHz scaled by the clock ratio. Then, proceed with programming. VV Primary DDS, record commands: F1 18.267725988522 Fd 0.000000002863 Td 1 Tr 39321600 M 3 A D VQ 3600 VI 3600 S QUE string: 00000000109D495182AA000000000000000000000B2F02580000000001104A87600E100E10000FFF Secondary DDS, record commands: F0 18.267635916529 A D S QUE string: 00000000109D43F31EF100000000000000000000000000000005000000104A00400FFF0FFF000FFF 4. Signals measurements and adjustments Frequency meter: Clock: temporarily set jumper to VCO on, using Rb external clock and frequency counter, set back to VCO off after tuning
RF power meter: Mini Circuits PWR-SEN-6G+ USB power sensor Note: terminate all back panel open connectors with 50 Ohm while measuring
VQ 3530 S QUE string 00000000109D495182AA000000000000000000000B2F02580000000001104A87600E100DCA000FFF Oscilloscope on 1 MOhm input:
Disable clock VCO, power cycle and verify that it comes back with all the parameters OK: |