Recent Changes - Search:

radlab home

radlab support

generic HFDR

principles
hardware
software
production
documents
pictures

know-how

projects

CNMI-Guam
IFREMER
ISMER
PACIOOS
UABC
UHHilo
UP-MSI
WHOI

old projects

MEC
OGS
UAF

wiki instructions

.

The Radio Oceanography Laboratory HF radar

Design and production of a generic low-power low-cost high frequency Doppler radar scatterometer (HDRS) for coastal zone oceanography

Technical description

A new phased array HFDRS a.k.a. HF Doppler Radar has been designed, maximizing commercial-off-the-shelf (COTS) components thus minimizing overall cost. For 8 channels, components cost less than k$20 and one man-day suffice for assembly, testing and calibration. It consists of three subsystems: a digital controller, a radio power amplifier, and an analog receiver/demodulator.

The digital controller integrates all the functions needed to generate the transmitted high-frequency radio signal, and to synchronously digitize the demodulated outputs from the receivers. It contains, on a single printed-circuit boards stack 22cm x 8cm x 5cm weighting 300g and requiring 20W:

(i) a low phase noise oven-controlled crystal oscillator (OCXO), optionally slaved to a GNSS receiver
(ii) a clock-remapping direct digital synthesizer (DDS) to generate arbitrary system clock frequencies with micro-hertz resolution
(iii) synchronized dual DDS to generate transmit (TX) and orthogonal local oscillator (LO) signals in the 3-50MHz range
(iv) 8, 16, or 32-channel 24-bit analog-to-digital sigma-delta digitizers with 512x oversampling and digital low-pass filtering
(v) further digital low-pass filtering and /64 decimation performed in an FPGA with DSP cores

The final sampling frequency is typically 375 Hz, reducing storage requirements for raw data archiving. The controller can be used to generate classical frequency-ramped (chirped) continuous wave signals, as well as time-delayed pseudo-random code phase-modulated sequences. A Linux-based ARM Cortex processor embedded in the FPGA provides post-processing for real-time product generation and data archiving.

The power amplifier is based on a class AB MOSFET amplifier, boosting the DDS signal to 50W maximum RF output, with digital VSWR and gain control using a dedicated Raspberry-Pi module. Spurious harmonics are reduced by a 9th order butterworth filter. Transmission is through λ/8 passive antenna monopoles, configured as dual or quadruple phased-arrays to reduce land-ward energy and to decouple direct path from the transmitting to receiver antennas.

The receive antennas are compact active monopoles with embedded out-of-band rejection filters. The analog homodyne receivers perform a complex demodulation by double-balanced mixers, translating the HF spectrum to the audio band.

The total power consumption is 300W full duty and 80W stand-by, thus enabling solar, wind or fuel cell operation in remote areas. Except for the out-of-band rejection filters, the electronics can operate between 3 and 50 MHz with no modification.

At 16 MHz, 20 W transmit power, 10 min averaging time, a range of 100 km for currents measurements is routinely achieved.

One hundred units have been built, and were deployed in Hawai'i, New England, Mexico, Canada, Taiwan, France and the Philippines.

Edit - History - Print - Recent Changes - Search
Page last modified on April 22, 2024, at 01:25 am